13 mars 2023 | International, Naval
Documents published by OMB offer an early look at the services' budget requests ahead of the Pentagon's rollout next week.
25 août 2021 | International, Aérospatial
After a shoot-off in the New Mexico desert, the Army has made its choice on who will build prototypes for its enduring Indirect Fires Protection Capability.
9 janvier 2019 | International, Aérospatial
Angel Krasimirov, Tsvetelia Tsolova SOFIA (Reuters) - The Bulgarian government has approved a plan to start talks with the United States on buying eight new F-16 fighter jets to replace its ageing Soviet-made MiG-29s and improve compliance with NATO standards, the defense minister said on Wednesday. A deal for Lockheed Martin's F-16V Block 70 would be worth around 1.8 billion levs ($1.1 billion), Bulgaria's biggest military procurement since the fall of Communist rule some 30 years ago. The decision still requires parliament's approval. Other bidders had included Sweden, with Saab's Gripen jets, and Italy, with second-hand Eurofighters. Senior defense ministry and army officials say the F-16 is a multi-role fighter plane that had been tested in battle and had a long lifespan. The defense ministry has previously said that the United States does not need additional licenses and agreements to supply the war plans with the necessary weaponry and licenses, unlike the offers from Sweden and Italy. “The government is proposing to the parliament to allow it to start talks with the United States to acquire new war planes,” Defense Minister Krasimir Karakachanov told reporters. The center-right coalition government has a thin majority in parliament, which is expected to vote on the move next week. The plan has spurred heated political debates in the Black Sea country with supporters hailing it as a strategic choice for Bulgaria, whose NATO neighbors are also flying F-16s, while critics accused the government of breaching the tender rules. On Tuesday, the White House said the United States was ready to work with the government to tailor a deal that will fit Bulgaria's budgetary and operational requirements. Its bid at present exceeds the tender's estimated limit, officials said. “We believe that the F-16 Block 70 offers Bulgaria the best possible combination of price, capability and interoperability with other NATO air forces,” U.S. President Donald Trump's administration said in a statement. Bulgarian President Rumen Radev, a former air force commander and frequent critic of Prime Minister Boyko Borissov, is believed to favor the Swedish bid and has criticized the process as flawed and “a triumph of lobbying”. Critics have questioned whether the United States can deliver the first two F-16 jets within two years as required and pointed to a U.S. proposal for a one-off payment upon contracting rather than offering a long-term payment scheme as preferred in the tender. Sweden has expressed its disappointment over the decision and said its offer was well below the estimated budget, provided for deferred payment and was ready to deliver on time. The question of which warplanes to buy has been vexing successive governments in Bulgaria for more than a decade. Borissov's government re-launched the tender in July, after a parliament commission ruled that a previous process which favored the Gripen jets, should be reviewed. ($1 = 1.7057 leva) Editing by Kevin Liffey and Susan Fenton https://www.reuters.com/article/us-bulgaria-defence-jets/bulgaria-decides-to-start-talks-with-u-s-on-f-16-jet-deal-idUSKCN1P30W9
29 mars 2019 | International, Autre défense
The current generation of machine learning (ML) systems would not have been possible without significant computing advances made over the past few decades. The development of the graphics-processing unit (GPU) was critical to the advancement of ML as it provided new levels of compute power needed for ML systems to process and train on large data sets. As the field of artificial intelligence looks towards advancing beyond today's ML capabilities, pushing into the realms of “learning” in real-time, new levels of computing are required. Highly specialized Application-Specific Integrated Circuits (ASICs) show promise in meeting the physical size, weight, and power (SWaP) requirements of advanced ML applications, such as autonomous systems and 5G. However, the high cost of design and implementation has made the development of ML-specific ASICs impractical for all but the highest volume applications. “A critical challenge in computing is the creation of processors that can proactively interpret and learn from data in real-time, apply previous knowledge to solve unfamiliar problems, and operate with the energy efficiency of the human brain,” said Andreas Olofsson, a program manager in DARPA's Microsystems Technology Office (MTO). “Competing challenges of low-SWaP, low-latency, and adaptability require the development of novel algorithms and circuits specifically for real-time machine learning. What's needed is the rapid development of energy efficient hardware and ML architectures that can learn from a continuous stream of new data in real time.” DARPA's Real Time Machine Learning (RTML) program seeks to reduce the design costs associated with developing ASICs tailored for emerging ML applications by developing a means of automatically generating novel chip designs based on ML frameworks. The goal of the RTML program is to create a compiler – or software platform – that can ingest ML frameworks like TensorFlow and Pytorch and, based on the objectives of the specific ML algorithms or systems, generate hardware design configurations and standard Verilog code optimized for the specific need. Throughout the lifetime of the program, RTML will explore the compiler's capabilities across two critical, high-bandwidth application areas: 5G networks and image processing. “Machine learning experts are proficient in developing algorithms but have little to no knowledge of chip design. Conversely, chip designers are not equipped with the expertise needed to inform the design of ML-specific ASICs. RTML seeks to merge these unique areas of expertise, making the process of designing ultra-specialized ASICs more efficient and cost-effective,” said Olofsson. Based on the application space's anticipated agility and efficiency, the RTML compiler provides an ideal platform for prototyping and testing fundamental ML research ideas that require novel chip designs. As such, DARPA plans to collaborate with the National Science Foundation (NSF) on this effort. NSF is pursuing its own Real Time Machine Learning program focused on developing novel ML paradigms and architectures that can support real-time inference and rapid learning. After the first phase of the DARPA RTML program, the agency plans to make its compiler available to NSF researchers to provide a platform for evaluating their proposed ML algorithms and architectures. During the second phase of the program, DARPA researchers will have an opportunity to evaluate the compiler's performance and capabilities using the results generated by NSF. The overall expectation of the DARPA-NSF partnership is to lay the foundation for next-generation co-design of RTML algorithms and hardware. “We are excited to work with DARPA to fund research teams to address the emerging challenges for real-time learning, prediction, and automated decision-making,” said Jim Kurose, NSF's head for Computer and Information Science and Engineering. “This collaboration is in alignment with the American AI Initiative and is critically important to maintaining American leadership in technology and innovation. It will contribute to advances for sustainable energy and water systems, healthcare logistics and delivery, and advanced manufacturing.” RTML is part of the second phase of DARPA's Electronics Resurgence Initiative (ERI) – a five-year, upwards of $1.5 billion investment in the future of domestic, U.S. government, and defense electronics systems. As a part of ERI Phase II, DARPA is supporting domestic manufacturing options and enabling the development of differentiated capabilities for diverse needs. RTML is helping to fulfill this mission by creating a means of expeditiously and cost-effectively generating novel chip designs to support emerging ML applications. Interested proposers will have an opportunity to learn more about the RTML program during a Proposers Day, which will be held at 675 North Randolph Street, Arlington, VA 22203 on Tuesday April 2, 2019 from 09:00 am – 03:00 pm EDT. Additional information about the event and registration are found here: https://www.fbo.gov/index?s=opportunity&mode=form&id=29e4d24ce31d2bf276a2162fae3d11cd&tab=core&_cview=0 Additional details on the RTML program are in the Broad Agency Announcement, published to fbo.gov: https://www.fbo.gov/index.php?s=opportunity&mode=form&id=a32e37cfad63edcba7cfd5d997422d93&tab=core&_cview=0 https://www.darpa.mil/news-events/2019-03-21