Pentagon chief technologist argues case for rapid experimentation fund

Sur le même sujet

• 

  25 octobre 2023 | International, Terrestre

  Elbit Systems Awarded Approximately $170 Million Contract to Become Integration Partner for Swedish Army LSS Mark Digitization Program

  As the integration partner, Elbit Systems Sweden will lead the roll-out of the Swedish Armed Forces digitization program for the army and integrate, install, maintain and upgrade command and control...

• 

  29 mars 2019 | International, Autre défense

  DARPA: Designing Chips for Real Time Machine Learning

  The current generation of machine learning (ML) systems would not have been possible without significant computing advances made over the past few decades. The development of the graphics-processing unit (GPU) was critical to the advancement of ML as it provided new levels of compute power needed for ML systems to process and train on large data sets. As the field of artificial intelligence looks towards advancing beyond today's ML capabilities, pushing into the realms of “learning” in real-time, new levels of computing are required. Highly specialized Application-Specific Integrated Circuits (ASICs) show promise in meeting the physical size, weight, and power (SWaP) requirements of advanced ML applications, such as autonomous systems and 5G. However, the high cost of design and implementation has made the development of ML-specific ASICs impractical for all but the highest volume applications. “A critical challenge in computing is the creation of processors that can proactively interpret and learn from data in real-time, apply previous knowledge to solve unfamiliar problems, and operate with the energy efficiency of the human brain,” said Andreas Olofsson, a program manager in DARPA's Microsystems Technology Office (MTO). “Competing challenges of low-SWaP, low-latency, and adaptability require the development of novel algorithms and circuits specifically for real-time machine learning. What's needed is the rapid development of energy efficient hardware and ML architectures that can learn from a continuous stream of new data in real time.” DARPA's Real Time Machine Learning (RTML) program seeks to reduce the design costs associated with developing ASICs tailored for emerging ML applications by developing a means of automatically generating novel chip designs based on ML frameworks. The goal of the RTML program is to create a compiler – or software platform – that can ingest ML frameworks like TensorFlow and Pytorch and, based on the objectives of the specific ML algorithms or systems, generate hardware design configurations and standard Verilog code optimized for the specific need. Throughout the lifetime of the program, RTML will explore the compiler's capabilities across two critical, high-bandwidth application areas: 5G networks and image processing. “Machine learning experts are proficient in developing algorithms but have little to no knowledge of chip design. Conversely, chip designers are not equipped with the expertise needed to inform the design of ML-specific ASICs. RTML seeks to merge these unique areas of expertise, making the process of designing ultra-specialized ASICs more efficient and cost-effective,” said Olofsson. Based on the application space's anticipated agility and efficiency, the RTML compiler provides an ideal platform for prototyping and testing fundamental ML research ideas that require novel chip designs. As such, DARPA plans to collaborate with the National Science Foundation (NSF) on this effort. NSF is pursuing its own Real Time Machine Learning program focused on developing novel ML paradigms and architectures that can support real-time inference and rapid learning. After the first phase of the DARPA RTML program, the agency plans to make its compiler available to NSF researchers to provide a platform for evaluating their proposed ML algorithms and architectures. During the second phase of the program, DARPA researchers will have an opportunity to evaluate the compiler's performance and capabilities using the results generated by NSF. The overall expectation of the DARPA-NSF partnership is to lay the foundation for next-generation co-design of RTML algorithms and hardware. “We are excited to work with DARPA to fund research teams to address the emerging challenges for real-time learning, prediction, and automated decision-making,” said Jim Kurose, NSF's head for Computer and Information Science and Engineering. “This collaboration is in alignment with the American AI Initiative and is critically important to maintaining American leadership in technology and innovation. It will contribute to advances for sustainable energy and water systems, healthcare logistics and delivery, and advanced manufacturing.” RTML is part of the second phase of DARPA's Electronics Resurgence Initiative (ERI) – a five-year, upwards of $1.5 billion investment in the future of domestic, U.S. government, and defense electronics systems. As a part of ERI Phase II, DARPA is supporting domestic manufacturing options and enabling the development of differentiated capabilities for diverse needs. RTML is helping to fulfill this mission by creating a means of expeditiously and cost-effectively generating novel chip designs to support emerging ML applications. Interested proposers will have an opportunity to learn more about the RTML program during a Proposers Day, which will be held at 675 North Randolph Street, Arlington, VA 22203 on Tuesday April 2, 2019 from 09:00 am – 03:00 pm EDT. Additional information about the event and registration are found here: https://www.fbo.gov/index?s=opportunity&mode=form&id=29e4d24ce31d2bf276a2162fae3d11cd&tab=core&_cview=0 Additional details on the RTML program are in the Broad Agency Announcement, published to fbo.gov: https://www.fbo.gov/index.php?s=opportunity&mode=form&id=a32e37cfad63edcba7cfd5d997422d93&tab=core&_cview=0 https://www.darpa.mil/news-events/2019-03-21

• 

  9 avril 2018 | International, C4ISR

  Here’s what the Army wants in future radios

  By: Mark Pomerleau Advancements in electronics and tactics by high-end adversaries are forcing the Army to change the way it revamps and optimizes its communications network against current and future threats. The problem: adversaries have become more proficient and precise in the sensing and jamming of signals. “What we're looking for in terms of resilience in the future is not only making individual links more anti-jam and resilient, resistant to threats, but also having the ability to use multiple paths if one goes down,” Joe Welch, chief engineer at Program Executive Office Command, Control, Communications Tactical (C3T), told reporters during a network demo at Fort Myer in early March. “Your phones work this way between 4G and Wi-Fi and that's seamless to you. That's kind of the target of what we're intending to provide with next-generation transport for the Army's tactical network.” Members of industry are now looking to develop radios to these specifications outlined by the Army. “We have an extensive library of waveforms — 51, 52 waveforms that we can bring to bear — that we can say look we can use this waveform to give you more resilience with this capability,” Jeff Kroon, director of product management at Harris, told C4ISRNET during an interview at the AUSA Global Force Symposium in Huntsville, Alabama, in March. “Down the road, we need to talk about resilience and what's going on with the near-peer threats.” Next-generation systems, leaders believe, will be able to provide this necessary flexibility. “The radios that we're looking at buying now — the manpack and the two-channel leader radios — have shown themselves to be able to run a pretty wide range of waveforms and we think it postures us to run some changes to those waveforms in the future as we look at even more advanced waveforms,” Maj. Gen. David Bassett, program executive officer of C3T, told reporters at Fort Myer. While jammers have become more powerful and targeted in recent years, officials contend the entire spectrum can't be interrupted at once. The Army realizes links won't be jam-proof, Bassett told reporters at Fort Myer, so it is looking at how they can be either more jam-resistant or able to switch seamlessly across portions of the spectrum that are not being jammed. Kroon noted that one of the big developments within the radio community down the road will be radios that seamlessly switch frequencies or waveforms without direct user input. “I think, as we move forward, we'll start to have more cognitive capabilities that will allow [the radio] to adapt automatically, and keep the user focused on their own job and let the radio handle the rest,” he said. In addition to multiwaveform and a large range of spectrum coverage, Kroon said the Army is also really looking for multifunction capabilities within radios. Radios also have to have passive sensing capabilities to be able to understand the signals in the environment and provide some level of situational awareness of the spectrum environment. “They have to have visibility into what's going on around them ... not just for [electronic warfare] purposes but sometime just knowing what's going on in the spectrum around you as a planner is really important,” Kroon said. “What's actually going on out there, I don't know I was told this frequency was clear, how do I really know. Having a radio come back and say look what we hit ... it is actually very useful.” https://www.c4isrnet.com/show-reporter/global-force-symposium/2018/04/06/heres-what-the-army-wants-in-future-radios/