New ICS Malware 'FrostyGoop' Targeting Critical Infrastructure

Sur le même sujet

• 

  25 juin 2020 | International, Aérospatial, C4ISR

  Senate bill would add $120M for hypersonic tracking satellites

  Nathan Strout The Senate's annual defense policy bill would authorize an additional $120 million toward a space-based sensor layer capable of tracking hypersonic weapons, despite the fact the Department of Defense did not seek more funding for the project in its fiscal 2021 budget requests. The Hypersonic and Ballistic Tracking Space Sensor is DoD's answer to the growing threat posed by hypersonic weapons being developed by China and Russia. Hypersonic weapons present a significant challenge to the United States' current missile warning architecture. Not only can these weapons maneuver around ground based sensors, they're too dim to be picked up and tracked by space-based sensors in higher orbits. HBTSS theoretically solves this problem via a proliferated constellation of Overhead Persistent Infrared (OPIR) sensors operating in low earth orbit. At that lower orbit, the sensors will be able to pick up and track the otherwise dim objects. But because the satellites are closer to the earth and have a limited field of view, the system will need to pass off custody responsibility from sensor to sensor as the weapons traverse the globe. Hence the need for a proliferated constellation. HBTSS will plug into the Space Development Agency's National Defense Space Architecture, a new system of satellites operating in low earth orbit. The Missile Defense Agency awarded $20 million contracts to four companies in October to develop HBTSS prototypes: Northrop Grumman, Leidos, Harris Corporation and Raytheon. The Senate's version of the National Defense Authorization Act would authorize the Missile Defense Agency $120 million in research, development, testing and engineering funds for HBTSS. If passed, this would be the second consecutive year the department did not include money for HBTSS in its annual budget request, but Congress allocated money for the project anyway. In 2019, MDA put the program at the top of its unfunded priority list, seeking $108 million for that effort. Congress fully funded that request in the legislation that passed in December. The decision to give the HBTSS funding to the Missile Defense Agency in fiscal year 2021 continues a 2019 battle between the administration and Congress over which agency should lead the program's development effort. While lawmakers wanted to place MDA firmly in charge of the effort, the White House argued that it was too soon to put one agency in charge. Ultimately, Congress included a provision putting primary responsibility for the development and deployment of the system in MDA's hands. Just three months after that legislation passed, lawmakers expressed frustration and confusion over MDA's FY2021 budget request, which sought to transfer HBTSS funding responsibility to SDA. While MDA Director Vice Adm. Jon Hill tried to assure legislators at the March hearing that his agency was fully in charge of developing the sensor for HBTSS, skepticism has continued. According to Hill, funding for the effort would be allocated to SDA, who would in turn provide the funding to MDA. As currently drafted, the legislation de facto rejects DoD's request to transfer funding responsibility to SDA. Furthermore, it specifically assigns principal responsibility for the development and deployment of HBTSS through the end of FY2022, after which it may be transferred over to the U.S. Space Force. It's not the only legislative proposal emphasizing Congress' desire for MDA to be in charge of the system. The House version of the FY2021 defense bill made public in June asks for the Secretary of Defense to certify that MDA is indeed in charge of HBTSS. According to a defense official, Under Secretary of Defense for Research and Engineering Michael Griffin sent a letter signed May 29 certifying that MDA was in charge of payload development. Griffin has since resigned, stating that he has received an opportunity to work in the private sector. The Senate version requires on orbit testing of HBTSS to begin by December 31, 2022, with full operational deployment as soon as technically feasible. https://www.c4isrnet.com/battlefield-tech/space/2020/06/24/senate-bill-adds-120m-for-hypersonic-tracking-satellites/

• 

  22 mai 2020 | International, Aérospatial

  Indian Air Force restructures $17 billion fighter jet program

  By: Vivek Raghuvanshi NEW DELHI — The Indian Air Force is overhauling its plan to induct 114 medium-weight multirole fighters, with a senior service official saying the aircraft will be built in India with significant foreign technology transfer and no foreign procurement. The effort will cost about $17 billion under the Make in India economic policy. The Air Force official said the project is very much alive, but that the “final nitty-gritties have yet to be worked out, and that will take time because it will require manufacturing capability building in the country.” Daljit Singh, a retired Indian Air Force air marshal and current defense analyst, agreed that India must move quickly to create the capability to manufacture high-tech systems at home. “The main aim should be to extract the maximum [transfer of technology] from the OEM [original equipment manufacturer] and start manufacturing subcomponents through Indian companies," Singh said. Finance Minister Nirmala Sitharaman announced Saturday that the government will create a separate budget for domestic procurement of weapons and equipment to help reduce the imports bill. A Ministry of Defence official said a formal budget allocation of about $17 billion for the multirole fighters project will be granted sometime next year, and will be launched under the Strategic Partners procurement policy. Under that policy, the multirole fighters will be manufactured by domestic private defense companies with one of the original equipment manufacturers approved by the government. The process for selecting contractors is yet to begin, but the MoD official said the businesses will be selected within three years. No private defense company in India has made fighter jets before, but several have expressed interest in participating in the program, including Tata Advanced Systems, Adani Defence, Reliance Defence, Mahindra Defence and Bharat Forge Limited. Reliance Defence has created a joint venture with France's Dassault Aviation, which currently manufactures components for Rafale fighters. Meanwhile, Tata Advanced Systems has teamed with Lockheed Martin, an American company that produces the F-35 Joint Strike Fighter. Adani Defence has announced a teaming arrangement Sweden's Saab AB, which makes the Gripen jet. Another Indian Air Force official said a request for information was sent in June 2018 to foreign original equipment manufacturers for the multirole fighters. Among those who have responded to the RFI are: Boeing, Lockheed Martin, Dassault Aviation, Saab AB, Airbus Defence and Space, Russian Aircraft Corporation, and Sukhoi Company. The Indian Air Force plans to induct all 114 multirole fighters within 12 years after the contract is awarded. The official added that the RFI included the requirement for transfer of technology, including the transfer of design, development, manufacturing and repair expertise. It also included the requirement for the unilateral capability to integrate weapons, systems and sensors. The capability to upgrade the aircraft and a provision on exporting the aircraft is also part of the program. India is also seeking transfer of technology for stealth technology, active electronically scanned array radars, avionics, electronic warfare systems and engines. “The advantage of making a fighter aircraft in India is that the customer can select the types of sensors, EW equipment, avionics and weapons, as per operational requirements. Subsequently, the customer is assured of full logistic and upgrade support without any restriction. However, it is important to embed most of these systems in the aircraft design itself to ensure low observability and systems compatibility,” he said. However, Singh, the defense analyst, said any transfer of technology agreement would need to make business sense to the OEM. “Propriety Items could still be under the control of the OEM,” he said. https://www.defensenews.com/global/asia-pacific/2020/05/21/indian-air-force-restructures-17-billion-fighter-jet-program/

• 

  29 mars 2019 | International, Autre défense

  DARPA: Designing Chips for Real Time Machine Learning

  The current generation of machine learning (ML) systems would not have been possible without significant computing advances made over the past few decades. The development of the graphics-processing unit (GPU) was critical to the advancement of ML as it provided new levels of compute power needed for ML systems to process and train on large data sets. As the field of artificial intelligence looks towards advancing beyond today's ML capabilities, pushing into the realms of “learning” in real-time, new levels of computing are required. Highly specialized Application-Specific Integrated Circuits (ASICs) show promise in meeting the physical size, weight, and power (SWaP) requirements of advanced ML applications, such as autonomous systems and 5G. However, the high cost of design and implementation has made the development of ML-specific ASICs impractical for all but the highest volume applications. “A critical challenge in computing is the creation of processors that can proactively interpret and learn from data in real-time, apply previous knowledge to solve unfamiliar problems, and operate with the energy efficiency of the human brain,” said Andreas Olofsson, a program manager in DARPA's Microsystems Technology Office (MTO). “Competing challenges of low-SWaP, low-latency, and adaptability require the development of novel algorithms and circuits specifically for real-time machine learning. What's needed is the rapid development of energy efficient hardware and ML architectures that can learn from a continuous stream of new data in real time.” DARPA's Real Time Machine Learning (RTML) program seeks to reduce the design costs associated with developing ASICs tailored for emerging ML applications by developing a means of automatically generating novel chip designs based on ML frameworks. The goal of the RTML program is to create a compiler – or software platform – that can ingest ML frameworks like TensorFlow and Pytorch and, based on the objectives of the specific ML algorithms or systems, generate hardware design configurations and standard Verilog code optimized for the specific need. Throughout the lifetime of the program, RTML will explore the compiler's capabilities across two critical, high-bandwidth application areas: 5G networks and image processing. “Machine learning experts are proficient in developing algorithms but have little to no knowledge of chip design. Conversely, chip designers are not equipped with the expertise needed to inform the design of ML-specific ASICs. RTML seeks to merge these unique areas of expertise, making the process of designing ultra-specialized ASICs more efficient and cost-effective,” said Olofsson. Based on the application space's anticipated agility and efficiency, the RTML compiler provides an ideal platform for prototyping and testing fundamental ML research ideas that require novel chip designs. As such, DARPA plans to collaborate with the National Science Foundation (NSF) on this effort. NSF is pursuing its own Real Time Machine Learning program focused on developing novel ML paradigms and architectures that can support real-time inference and rapid learning. After the first phase of the DARPA RTML program, the agency plans to make its compiler available to NSF researchers to provide a platform for evaluating their proposed ML algorithms and architectures. During the second phase of the program, DARPA researchers will have an opportunity to evaluate the compiler's performance and capabilities using the results generated by NSF. The overall expectation of the DARPA-NSF partnership is to lay the foundation for next-generation co-design of RTML algorithms and hardware. “We are excited to work with DARPA to fund research teams to address the emerging challenges for real-time learning, prediction, and automated decision-making,” said Jim Kurose, NSF's head for Computer and Information Science and Engineering. “This collaboration is in alignment with the American AI Initiative and is critically important to maintaining American leadership in technology and innovation. It will contribute to advances for sustainable energy and water systems, healthcare logistics and delivery, and advanced manufacturing.” RTML is part of the second phase of DARPA's Electronics Resurgence Initiative (ERI) – a five-year, upwards of $1.5 billion investment in the future of domestic, U.S. government, and defense electronics systems. As a part of ERI Phase II, DARPA is supporting domestic manufacturing options and enabling the development of differentiated capabilities for diverse needs. RTML is helping to fulfill this mission by creating a means of expeditiously and cost-effectively generating novel chip designs to support emerging ML applications. Interested proposers will have an opportunity to learn more about the RTML program during a Proposers Day, which will be held at 675 North Randolph Street, Arlington, VA 22203 on Tuesday April 2, 2019 from 09:00 am – 03:00 pm EDT. Additional information about the event and registration are found here: https://www.fbo.gov/index?s=opportunity&mode=form&id=29e4d24ce31d2bf276a2162fae3d11cd&tab=core&_cview=0 Additional details on the RTML program are in the Broad Agency Announcement, published to fbo.gov: https://www.fbo.gov/index.php?s=opportunity&mode=form&id=a32e37cfad63edcba7cfd5d997422d93&tab=core&_cview=0 https://www.darpa.mil/news-events/2019-03-21