15 mai 2024 | International, Aérospatial
Nuclear-powered submarines are starting to consume an enormous portion of the budget as the trilateral AUKUS agreement progresses.
28 avril 2024 | International, Aérospatial
Its successor, the Information Support Force, will now handle network information systems and communications support, and possibly network defense.
24 septembre 2019 | International, Aérospatial
The Pentagon is assessing Lockheed Martin's proposal to reduce Joint Strike Fighter sustainment pricing by 16% over five years through a performance based logistics (PBL) contract, but the largest F-35 customer, the U.S. Air Force, says there are several things that must be worked out before signing the dotted line. The company delivered a white paper to Ellen Lord, under secretary of defense for acquisition and sustainment, in August outlining how a five-year PBL contract could save the military money on F-35 sustainment, Ken Merchant, F-35 sustainment vice president for Lockheed Martin, told reporters last week at the Air Force Association's annual conference in National Harbor, Maryland. Current F-35 sustainment contracts are annual and do not allow the Joint Strike Fighter's supplier base to conduct forward planning, he said. “What a PBL would do for us is give a five-year contract with [the] government and it would allow our suppliers to make those investments knowing that they have five years worth of business guaranteed,” Merchant said. The F-35 program has delivered over 425 aircraft to the fleet and will continue to grow; in fact it will double over the next few years. This is something the Pentagon must consider before entering a PBL with Lockheed Martin, Will Roper, assistant secretary of the Air Force for acquisition, technology, and logistics, told Aerospace DAILY in an exclusive Sept. 18 interview. “Normally a performance-based logistics contract makes sense when you have a majority of the fleet fielded, then you can start doing stable buys,” Roper said. “Those are the details that we'll need to look at. It's not just, would the performance-based logistics contract make sense if the fleet size were frozen? Does it make sense as the fleet size grows?” The Pentagon also must consider supply chain issues and software for the Autonomic Logistics Information System (ALIS) as the fleet size grows, he said. “Those problems might grow linearly as the fleet size grows [or] we might get a non-linear effect where they compound,” Roper said. “Those are the things we'll need to think through.” In a perfect world, Lockheed Martin would like to negotiate a multiyear sustainment contract for the F-35, but executives admit the construct would be hard to sell on Capitol Hill. “Multiyear contracts that are performance based can be very successful because they invite industry to make the upfront investment so that they can recoup their investment in terms of profit at a predictable period without worrying about the variability and the vacillations of the budgeting cycle,” Roper said. “The theory is sound, it's just the practice that has to be reviewed.” Roper worries about F-35 software the most because it is not only needed to sustain the system but also is integral for modernization. “Agile software development is so critical on our programs and I think it's not going to be a ‘nice to have' for the F-35, it's going to be an absolute ‘must have,'” he said. Under Roper's direction the Air Force launched Mad Hatter, a software coding project tackling ALIS that has delivered initial applications to the flightline at Nellis AFB in Nevada. “I'm really pleased that new [F-35 Joint Program Office] leadership under [Lt. Gen.] Eric Fick have viewed that as a very favorable direction for all of F-35 software that goes forward,” Roper said. “We're making the results available to them—not just the results in the field, but the process that produced them.” Lockheed Martin has pledged to migrate ALIS to the cloud by 2020 and Roper agrees this is paramount for the future of the program because the enterprise must use cloud-based development tools. This is the way the commercial industry is heading and it provides security benefits, he added. “I've directed numerous programs in the Air Force to move to our cloud-based DevSecOps stack, which is called Cloud One. F-16, F-22, B-21, [Ground Based Strategic Deterrent]—these are programs that need to write a lot of cloud quickly and securely,” Roper said. “Cloud-based development, if done correctly ... you can write secure code really quickly and get it accredited quickly, which we also want.” https://aviationweek.com/defense/pentagon-mulls-f-35-sustainment-proposal
29 mars 2019 | International, Autre défense
The current generation of machine learning (ML) systems would not have been possible without significant computing advances made over the past few decades. The development of the graphics-processing unit (GPU) was critical to the advancement of ML as it provided new levels of compute power needed for ML systems to process and train on large data sets. As the field of artificial intelligence looks towards advancing beyond today's ML capabilities, pushing into the realms of “learning” in real-time, new levels of computing are required. Highly specialized Application-Specific Integrated Circuits (ASICs) show promise in meeting the physical size, weight, and power (SWaP) requirements of advanced ML applications, such as autonomous systems and 5G. However, the high cost of design and implementation has made the development of ML-specific ASICs impractical for all but the highest volume applications. “A critical challenge in computing is the creation of processors that can proactively interpret and learn from data in real-time, apply previous knowledge to solve unfamiliar problems, and operate with the energy efficiency of the human brain,” said Andreas Olofsson, a program manager in DARPA's Microsystems Technology Office (MTO). “Competing challenges of low-SWaP, low-latency, and adaptability require the development of novel algorithms and circuits specifically for real-time machine learning. What's needed is the rapid development of energy efficient hardware and ML architectures that can learn from a continuous stream of new data in real time.” DARPA's Real Time Machine Learning (RTML) program seeks to reduce the design costs associated with developing ASICs tailored for emerging ML applications by developing a means of automatically generating novel chip designs based on ML frameworks. The goal of the RTML program is to create a compiler – or software platform – that can ingest ML frameworks like TensorFlow and Pytorch and, based on the objectives of the specific ML algorithms or systems, generate hardware design configurations and standard Verilog code optimized for the specific need. Throughout the lifetime of the program, RTML will explore the compiler's capabilities across two critical, high-bandwidth application areas: 5G networks and image processing. “Machine learning experts are proficient in developing algorithms but have little to no knowledge of chip design. Conversely, chip designers are not equipped with the expertise needed to inform the design of ML-specific ASICs. RTML seeks to merge these unique areas of expertise, making the process of designing ultra-specialized ASICs more efficient and cost-effective,” said Olofsson. Based on the application space's anticipated agility and efficiency, the RTML compiler provides an ideal platform for prototyping and testing fundamental ML research ideas that require novel chip designs. As such, DARPA plans to collaborate with the National Science Foundation (NSF) on this effort. NSF is pursuing its own Real Time Machine Learning program focused on developing novel ML paradigms and architectures that can support real-time inference and rapid learning. After the first phase of the DARPA RTML program, the agency plans to make its compiler available to NSF researchers to provide a platform for evaluating their proposed ML algorithms and architectures. During the second phase of the program, DARPA researchers will have an opportunity to evaluate the compiler's performance and capabilities using the results generated by NSF. The overall expectation of the DARPA-NSF partnership is to lay the foundation for next-generation co-design of RTML algorithms and hardware. “We are excited to work with DARPA to fund research teams to address the emerging challenges for real-time learning, prediction, and automated decision-making,” said Jim Kurose, NSF's head for Computer and Information Science and Engineering. “This collaboration is in alignment with the American AI Initiative and is critically important to maintaining American leadership in technology and innovation. It will contribute to advances for sustainable energy and water systems, healthcare logistics and delivery, and advanced manufacturing.” RTML is part of the second phase of DARPA's Electronics Resurgence Initiative (ERI) – a five-year, upwards of $1.5 billion investment in the future of domestic, U.S. government, and defense electronics systems. As a part of ERI Phase II, DARPA is supporting domestic manufacturing options and enabling the development of differentiated capabilities for diverse needs. RTML is helping to fulfill this mission by creating a means of expeditiously and cost-effectively generating novel chip designs to support emerging ML applications. Interested proposers will have an opportunity to learn more about the RTML program during a Proposers Day, which will be held at 675 North Randolph Street, Arlington, VA 22203 on Tuesday April 2, 2019 from 09:00 am – 03:00 pm EDT. Additional information about the event and registration are found here: https://www.fbo.gov/index?s=opportunity&mode=form&id=29e4d24ce31d2bf276a2162fae3d11cd&tab=core&_cview=0 Additional details on the RTML program are in the Broad Agency Announcement, published to fbo.gov: https://www.fbo.gov/index.php?s=opportunity&mode=form&id=a32e37cfad63edcba7cfd5d997422d93&tab=core&_cview=0 https://www.darpa.mil/news-events/2019-03-21