21 novembre 2022 | International, C4ISR
How automation can solve persistent cybersecurity problems
Long-standing issues including aging data systems and alert fatigue can be addressed with automation.
23 août 2018 | International, Aérospatial
Lockheed offers Japan majority of work in plan for new fighter jet
YUKIO TAJIMA, Nikkei staff writer
TOKYO -- Lockheed Martin has proposed that Japanese companies be responsible for more than half of the development and production of a next-generation fighter jet that Japan wants to introduce in 2030, Nikkei learned Wednesday.
Lockheed is offering Japan an upgraded version of the existing F-22. The U.S. currently bans exports of the plane known as "the Raptor," which is considered the world's most powerful fighter, has stealth capabilities and is armed with eight air-to-air missiles.
The U.S. aircraft manufacturer's decision to open the production to Japan comes out of the belief that there is little risk of technology leaks. The company also says providing the jet to Japan would contribute to the security of Asia. If the share of work pans out as proposed, it would strengthen Japan's defense industry and the Japan-U.S. alliance.
Lockheed's proposal comes in response to concerns in Japan that American companies might monopolize the development and production of the upgraded warplane, leaving little room for Japanese partners' involvement. The company calls the plan a Japan-led framework.
The next-generation fighter will replace Japan's F-2 jets, scheduled to retire around 2030. Tokyo initially looked for ways for Japan Inc. to completely develop a successor on its own, hoping to boost the domestic defense industry's orders, but the idea proved unfeasible due to technological and cost hurdles.
The Japanese government sees Lockheed's proposal, which could deliver high performance at reduced development costs, as the most promising alternative.
The next-generation fighter program is estimated to cost about 6 trillion yen ($54.2 billion), including development, acquisition and maintenance. Some voices are citing a need to update the F-22, which has been deployed since around 2000, and Lockheed's plan has the benefit of lowering upgrade costs shouldered by the U.S.
Although Japan produced 60% of the jointly developed F-2, the U.S. handled engine development since Japan did not have the basic technology at the time. But Lockheed has expressed a willingness this time to shift development and production of new engines to major Japanese heavy machinery maker IHI in the future. If IHI's XF9-1 jet engine is adopted, Japanese companies could be responsible for more than 60% of the total work.
In addition, the exports of high--margin military equipment for the project could ease the U.S. trade deficit with Japan.
Mitsubishi Electric's fighter jet electronics system could be adopted, and Mitsubishi Heavy Industries will handle the development and production of wings, according to the plan. The aircraft's body, engines and the fighter system are to be made in the U.S., but Lockheed intends to use more Japanese-made components, incorporating them gradually until Japanese companies play a central role in development.
To hasten development, Lockheed will send Japan F-22s that have not been deployed by the U.S. Air Force so that it can grasp its performance in advance.
The updates will improve the plane's main wings and allow more fuel to be loaded, increasing the jet's range to about 2,200 km so it can be used to defend isolated islands and other missions.
Although the F-22 has the most advanced stealth abilities in the world, it requires a special coating that is laborious to maintain. Maintenance will be simplified by using the same material as the F-35 stealth fighter, making it easier to perform drills and deploy for battle.
One challenge is the cost. Lockheed estimates the price of the next-generation fighter will be far higher than the F-35's 15 billion yen-per-jet price tag. Lockheed estimates the price of a next-generation F-22 at about 24 billion yen if it is part of an order of 70 aircraft. Producing 140 of the jets could reduce the unit price to about 21 billion yen.
There is also concern that including Japanese companies, which have not independently developed a fighter jet in recent years, could complicate production and ramp up costs. Lockheed initially estimated that the F-35A would cost about 10 billion yen per jet. Costs temporarily rose to 17 billion yen, however, when assembly was given to Japanese companies, a cause for concern this time.
Some doubt that the U.S. will fully disclose core technology for the world's most powerful fighter jet. Although Lockheed plans to outfit the jet with several Japan-made weapons in an effort to include as much domestic technology as possible, the U.S. will initially be responsible for most of the work, with Japanese companies gradually joining the process later. It is unclear, however, when development will proceed to that second stage.
"It is likely that the U.S. will not want to give up such core technologies as fighter systems and software," said Heigo Sato, a professor at Takushoku University. "The technological spillover to Japanese companies would be limited if they mostly receive subcontracting work."
Although Mitsubishi Heavy assembles the F-35, which has begun deployment, it has been pointed out that having that job has hardly improved the company's technology knowledge. The U.S. Congress also turned down Japan's request for the F-22 to succeed the F-4 a decade ago because of hesitance about transferring military technology.
Should technology transfers from the U.S. slow, it may hinder Japan's continued development of fighter jet technology.
Japan must choose whether to develop its own jet, jointly develop with another country or update existing aircraft. Tokyo will make its decisions at the end of the year in its revised medium-term defense program. Boeing and Britain's BAE Systems have also made submitted proposals to upgrade existing planes.
https://asia.nikkei.com/Politics/Lockheed-offers-Japan-majority-of-work-in-plan-for-new-fighter-jet
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29 mars 2019 | International, Autre défense
DARPA: Designing Chips for Real Time Machine Learning
The current generation of machine learning (ML) systems would not have been possible without significant computing advances made over the past few decades. The development of the graphics-processing unit (GPU) was critical to the advancement of ML as it provided new levels of compute power needed for ML systems to process and train on large data sets. As the field of artificial intelligence looks towards advancing beyond today's ML capabilities, pushing into the realms of “learning” in real-time, new levels of computing are required. Highly specialized Application-Specific Integrated Circuits (ASICs) show promise in meeting the physical size, weight, and power (SWaP) requirements of advanced ML applications, such as autonomous systems and 5G. However, the high cost of design and implementation has made the development of ML-specific ASICs impractical for all but the highest volume applications. “A critical challenge in computing is the creation of processors that can proactively interpret and learn from data in real-time, apply previous knowledge to solve unfamiliar problems, and operate with the energy efficiency of the human brain,” said Andreas Olofsson, a program manager in DARPA's Microsystems Technology Office (MTO). “Competing challenges of low-SWaP, low-latency, and adaptability require the development of novel algorithms and circuits specifically for real-time machine learning. What's needed is the rapid development of energy efficient hardware and ML architectures that can learn from a continuous stream of new data in real time.” DARPA's Real Time Machine Learning (RTML) program seeks to reduce the design costs associated with developing ASICs tailored for emerging ML applications by developing a means of automatically generating novel chip designs based on ML frameworks. The goal of the RTML program is to create a compiler – or software platform – that can ingest ML frameworks like TensorFlow and Pytorch and, based on the objectives of the specific ML algorithms or systems, generate hardware design configurations and standard Verilog code optimized for the specific need. Throughout the lifetime of the program, RTML will explore the compiler's capabilities across two critical, high-bandwidth application areas: 5G networks and image processing. “Machine learning experts are proficient in developing algorithms but have little to no knowledge of chip design. Conversely, chip designers are not equipped with the expertise needed to inform the design of ML-specific ASICs. RTML seeks to merge these unique areas of expertise, making the process of designing ultra-specialized ASICs more efficient and cost-effective,” said Olofsson. Based on the application space's anticipated agility and efficiency, the RTML compiler provides an ideal platform for prototyping and testing fundamental ML research ideas that require novel chip designs. As such, DARPA plans to collaborate with the National Science Foundation (NSF) on this effort. NSF is pursuing its own Real Time Machine Learning program focused on developing novel ML paradigms and architectures that can support real-time inference and rapid learning. After the first phase of the DARPA RTML program, the agency plans to make its compiler available to NSF researchers to provide a platform for evaluating their proposed ML algorithms and architectures. During the second phase of the program, DARPA researchers will have an opportunity to evaluate the compiler's performance and capabilities using the results generated by NSF. The overall expectation of the DARPA-NSF partnership is to lay the foundation for next-generation co-design of RTML algorithms and hardware. “We are excited to work with DARPA to fund research teams to address the emerging challenges for real-time learning, prediction, and automated decision-making,” said Jim Kurose, NSF's head for Computer and Information Science and Engineering. “This collaboration is in alignment with the American AI Initiative and is critically important to maintaining American leadership in technology and innovation. It will contribute to advances for sustainable energy and water systems, healthcare logistics and delivery, and advanced manufacturing.” RTML is part of the second phase of DARPA's Electronics Resurgence Initiative (ERI) – a five-year, upwards of $1.5 billion investment in the future of domestic, U.S. government, and defense electronics systems. As a part of ERI Phase II, DARPA is supporting domestic manufacturing options and enabling the development of differentiated capabilities for diverse needs. RTML is helping to fulfill this mission by creating a means of expeditiously and cost-effectively generating novel chip designs to support emerging ML applications. Interested proposers will have an opportunity to learn more about the RTML program during a Proposers Day, which will be held at 675 North Randolph Street, Arlington, VA 22203 on Tuesday April 2, 2019 from 09:00 am – 03:00 pm EDT. Additional information about the event and registration are found here: https://www.fbo.gov/index?s=opportunity&mode=form&id=29e4d24ce31d2bf276a2162fae3d11cd&tab=core&_cview=0 Additional details on the RTML program are in the Broad Agency Announcement, published to fbo.gov: https://www.fbo.gov/index.php?s=opportunity&mode=form&id=a32e37cfad63edcba7cfd5d997422d93&tab=core&_cview=0 https://www.darpa.mil/news-events/2019-03-21
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23 juin 2021 | International, Aérospatial
German defense ministry seeks $5.3 billion for next FCAS research phase
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