The light amphibious warship is delayed, but the Marine Corps has a temporary solution

On the same subject

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  June 1, 2020 | International, C4ISR

  US joins G7 artificial intelligence group to counter China

  By: Matt O'Brien, The Associated Press The U.S. has joined an international panel for setting ethical guidelines for the use of artificial intelligence, a move previously dismissed by the Trump administration. The White House's chief technology officer, Michael Kratsios, told The Associated Press on Thursday it is important to establish shared democratic principles as a counter to China's record of “twisting technology” in ways that threaten civil liberties. “Chinese technology companies are attempting to shape international standards on facial recognition and surveillance at the United Nations," he said. The Trump administration had been the lone holdout among leaders of the Group of Seven — the world's wealthiest democracies — in setting up the Global Partnership on AI. The partnership launched Thursday after a virtual meeting between national technology ministers. It was nearly two years after the leaders of Canada and France announced they were forming a group to guide the responsible adoption of AI based on shared principles of "human rights, inclusion, diversity, innovation and economic growth.” The Trump administration objected to that approach, arguing that too much focus on regulation would hamper U.S. innovation. But negotiations over the past year and changes to the group's scope led the U.S. to join, Kratsios said. “We worked very hard to make it clear that it would not be a standard-setting or policy-making body,” he said. U.S. involvement is important because of the large role that American tech firms play globally and its historic advocacy for human rights, said Kay Mathiesen, an associate professor focused on computer ethics at Northeastern University in Boston. “U.S. tech companies such as Microsoft, Google and Apple are all concerned about what guidelines they should be following to use AI responsibly,” she said. “Given their global presence, the fact that the U.S. wasn't involved does not mean that they would not end up having to follow any regulations developed by the rest of the G7.” The U.S. push to scrutinize AI-assisted surveillance tools built by China also fits into a broader trade war in which both countries are vying for technological dominance. Beijing on Monday demanded that Washington withdraw the latest round of export sanctions imposed on Chinese tech companies accused of playing roles in a crackdown in its Muslim northwestern region of Xinjiang. https://www.defensenews.com/global/the-americas/2020/05/29/us-joins-g7-artificial-intelligence-group-to-counter-china/

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  February 26, 2020 | International, Aerospace, C4ISR

  US Army wants $364 million for Defender Pacific in FY21

  By: Jen Judson WASHINGTON — The U.S. Army is requesting $364 million to conduct a division-sized exercise in the Indo-Pacific region in fiscal 2021, the service confirmed to Defense News. Yet, the cost breakout details are classified, according to an Army spokeswoman. The exercise is fueled by a rising China, characterized in the National Defense Strategy as a long-term, strategic competitor of the United States. The NDS lays out a world where great power competition rather than counterterrorism will drive the Defense Department's decision-making and force structure. While the U.S. Army has 85,000 permanently stationed troops in the Indo-Pacific region and is already conducting exercises such as Pacific Pathways with allies and partners, the service is aiming to practice rapid deployment from the continental United States to the Pacific. In FY20, the Army will conduct a smaller version of Defender Pacific while Defender Europe will get more investment and focus. But then attention and dollars will swing over to the Pacific in FY21. Defender Europe will be scaled back in FY21. The Army is requesting just $150 million to conduct the exercise in Europe, according to the Army. This year it has been reported that Defender Europe, already underway with troops and equipment arriving at ports on the continent this month, will cost about $340 million, which is roughly in line with what the service is requesting in FY21 for the Pacific version. The only specific funding lines broken out for the FY21 Defender Pacific exercise is home station training; it's unclear if those numbers are included in the total cost. The Army is requesting $150,000 for home stationing training devoted specifically for Defender Pacific and is also asking for another $214,252 for an “expanded level deployment exercise that demonstrates employment of [Continental United States]-based forces into the Pacific Theater,” according to budget documents. The funds include additional transportation, maintenance and operations for the exercise. Defender Pacific will build upon the U.S. Army's expanding role in the region. The service is already growing its Pacific Pathways exercise series and plans to focus on reinforcing the Oceania region this year. The series began in 2014 and has supported training efforts that satisfy bilateral needs between the U.S. Army and its allies and partners in the region in roughly three rotations each year for about 10 months total. Last year, Pacific Pathways shifted from shorter rotations that involved more countries to longer visits that involve fewer countries as a way to improve bilateral relations. And participation has grown from a battalion-sized task force to roughly the size of a brigade. The Defender series is intended to be a regular exercise each year in the Pacific and Europe with the regions trading off being the larger exercise every other year. https://www.defensenews.com/land/2020/02/25/army-wants-364-million-to-put-on-defender-pacific-in-fy21/

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  March 29, 2019 | International, C4ISR, Security, Other Defence

  DARPA Seeks to Make Scalable On-Chip Security Pervasive

  For the past decade, cybersecurity threats have moved from high in the software stack to progressively lower levels of the computational hierarchy, working their way towards the underlying hardware. The rise of the Internet of Things (IoT) has driven the creation of a rapidly growing number of accessible devices and a multitude of complex chip designs needed to enable them. With this rapid growth comes increased opportunity for economic and nation-state adversaries alike to shift their attention to chips that enable complex capabilities across commercial and defense applications. The consequences of a hardware cyberattack are significant as a compromise could potentially impact not millions, but billions of devices. Despite growing recognition of the issue, there are no common tools, methods, or solutions for chip-level security currently in wide use. This is largely driven by the economic hurdles and technical trade-offs often associated with secure chip design. Incorporating security into chips is a manual, expensive, and cumbersome task that requires significant time and a level of expertise that is not readily available in most chip and system companies. The inclusion of security also often requires certain trade-offs with the typical design objectives, such as size, performance, and power dissipation. Further, modern chip design methods are unforgiving – once a chip is designed, adding security after the fact or making changes to address newly discovered threats is nearly impossible. “Today, it can take six to nine months to design a modern chip, and twice as long if you want to make that same design secure,” said Serge Leef, a program manager in DARPA's Microsystems Technology Office (MTO). “While large merchant semiconductor companies are investing in in-house personnel to manually incorporate security into their high-volume silicon, mid-size chip companies, system houses, and start-ups with small design teams who create lower volume chips lack the resources and economic drivers to support the necessary investment in scalable security mechanisms, leaving a majority of today's chips largely unprotected.” To ease the burden of developing secure chips, DARPA developed the Automatic Implementation of Secure Silicon (AISS) program. AISS aims to automate the process of incorporating scalable defense mechanisms into chip designs, while allowing designers to explore economics versus security trade-offs and maximize design productivity. The objective of the program is to develop a design tool and IP ecosystem – which includes tool vendors, chip developers, IP licensers, and the open source community – that will allow security to be inexpensively incorporated into chip designs with minimal effort and expertise, ultimately making scalable on-chip security pervasive. Leef continued, “The security, design, and economic objectives of a chip can vary based on its intended application. As an example, a chip design with extreme security requirements may have to accept certain tradeoffs. Achieving the required security level may cause the chip to become larger, consume more power, or deliver slower performance. Depending on the application, some or all of these tradeoffs may be acceptable, but with today's manual processes it's hard to determine where tradeoffs can be made.” AISS seeks to create a novel, automated chip design flow that will allow the security mechanisms to scale consistently with the goals of the design. The design flow will provide a means of rapidly evaluating architectural alternatives that best address the required design and security metrics, as well as varying cost models to optimize the economics versus security tradeoff. The target AISS system – or system on chip (SoC) – will be automatically generated, integrated, and optimized to meet the objectives of the application and security intent. These systems will consist of two partitions – an application specific processor partition and a security partition implementing the on-chip security features. This approach is novel in that most systems today do not include a security partition due to its design complexity and cost of integration. By bringing greater automation to the chip design process, the burden of security inclusion can be profoundly decreased. While the threat landscape is ever evolving and expansive, AISS seeks to address four specific attack surfaces that are most relevant to digital ASICs and SoCs. These include side channel attacks, reverse engineering attacks, supply chain attacks, and malicious hardware attacks. “Strategies for resisting threats vary widely in cost, complexity, and invasiveness. As such, AISS will help designers assess which defense mechanisms are most appropriate based on the potential attack surface and the likelihood of a compromise,” said Leef. In addition to incorporating scalable defense mechanisms, AISS seeks to ensure that the IP blocks that make up the chip remain secure throughout the design process and are not compromised as they move through the ecosystem. As such, the program will also aim to move forward provenance and integrity validation techniques for preexisting design components by advancing current methods or inventing novel technical approaches. These techniques may include IP watermarking and threat detection to help validate the chip's integrity and IP provenance throughout its lifetime. AISS is part of the second phase of DARPA's Electronics Resurgence Initiative (ERI) – a five-year, upwards of $1.5 billion investment in the future of domestic, U.S. government, and defense electronics systems. Under ERI Phase II, DARPA is exploring the development of trusted electronics components, including the advancement of electronics that can enforce security and privacy protections. AISS will help address this mission through its efforts to enable scalable on-chip security. DARPA will hold a Proposers Day on April 10, 2019 at the DARPA Conference Center, located at 675 North Randolph Street, Arlington, Virginia 22203, to provide more information about AISS and answer questions from potential proposers. For details about the event, including registration requirements, please visit: https://www.fbo.gov/index?s=opportunity&mode=form&id=6770487d820ee13f33af67b0980a7d73&tab=core&_cview=0 Additional information will be available in the forthcoming Broad Agency Announcement, which will be posted to www.fbo.gov. https://www.darpa.mil/news-events/2019-03-25