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  June 27, 2019 | International, Other Defence

  Lockheed braces for German blowback over cost of missile-defense pitch

  By: Sebastian Sprenger PARIS — Lockheed Martin executives are preparing for a stiff debate in Germany about the price tag of a next-generation anti-missile system formally proposed to Berlin just days ago. “I think the price will be a challenge, and we'll have to negotiate to come to an agreement,” Frank St. John, executive vice president of the company's Missiles and Fire Control business, told Defense News in an interview at the Paris Air Show last week. “But we're going to do better than the early expectations of the price.” That is a reference to a figure that surfaced during the spring following testimony of a senior German defense official before parliament. At the time, the cost estimate for the TLVS program, short for Taktisches Luftverteidigungssystem, was €8 billion (U.S. $9 billion). St. John declined to name the price ultimately included by Lockheed Martin and its German partner MBDA in their June 21 proposal. But he suggested the figure would lie significantly enough below the €8 million mark to be considered more than cosmetic. “I still anticipate a healthy debate and discussion about the pricing and the scope of the program through the negotiation process,” he said. Negotiations are expected to begin as soon as the German Defence Ministry has analyzed the proposal, described by German officials as being thousands of pages long. If the government and Lockheed Martin come to an agreement, the proposed investment would go before lawmakers for a decision, probably late this year or early next year. German plans for the TLVS program are based on the Medium Extended Air Defense System, conceived about 10 years ago as a replacement for the Patriot fleets of the United States, Germany and Italy. Soldiers had criticized the decades-old Patriot system as too cumbersome to deploy and maintain in the field. Germany has stuck with MEADS even after the United States and Italy dropped off, with officials in Berlin arguing the prospect of developing a truly novel defensive weapon was worth the gamble of going it alone. Defense officials in Germany have since added new requirements. For one, Berlin wants full control over all components, as opposed to buying an American weapon whose inner workings are shrouded in secrecy. In addition, the German government wants to be able to shoot down what officials call “advanced threats” (code for hypersonic missiles, such as those developed by Russia). According to St. John, Lockheed's latest TLVS proposal comes with the promise of intercepting such threats, though probably not the most sophisticated ones. “And then there is a provision in the contract and in the design of the system to add capability as time goes by and as the threat evolves,” he said. One of the sticking points for the proposed program — German access to secret performance data of the weapon's principal interceptor, the so-called MSE missile — appears to have been resolved, St. John said. Until late last year, Berlin was unhappy with U.S. Army restrictions placed on the information, which Germany considers crucial for adapting the system to its needs. Senior Pentagon leaders intervened to help resolve the logjam after Defense News reported on the issue in December 2018. “We believe that we have coordinated that with the Department of State and the appropriate folks at the Department of Defense, and that the German customer is going to have access to the data they need to evaluate the system,” St. John said. “They'll also have access to the data they need to recommend future modifications. We think that issue is resolved now.” At the same time, he added, another round of approvals will be needed from the U.S. government as contract negotiations with Germany progress. “We'll have to go back one more time ... to verify that everything is still in a good place." Patriot-maker Raytheon issued a statement Monday reiterating its readiness to snatch the missile-defense contract from arch enemy Lockheed Martin if the TLVS program goes south. The company especially played up the option of connecting an upgraded Patriot system to a lower-tier system, made by Rheinmetall, to defend against drones and artillery rounds. Ralph Acaba, president of Raytheon's Integrated Defense Systems business, said his company is increasingly banking on a layered air defense concept in which different systems — perhaps owned by different countries — take on various threat types. “No single nation, no single system can do it all when it comes to missile defense,” he told Defense News at the Paris Air Show. According to Joseph de Antona, vice president for business development and strategy in Acaba's division, Raytheon does not consider Lockheed's TLVS bid a threat to Patriot sales. “If a country makes a decision, it's our responsibility to honor and recognize that,” he said. At the same time, he added, Raytheon plans to continue to advise the German government on new threats and how to counter them. The company is “absolutely” still talking to the Berlin government to that effect, de Antona told Defense News. German lawmakers on the Defence and Budget committees on Wednesday approved roughly €120 million to upgrade the country's Patriot fleet to the newest configuration, known as “3-plus.” According to Raytheon, Berlin's investments to keep Patriot up to date had been lagging since the decision in favor of TLVS. Meanwhile, the proposed new system's funding profile has begun to take shape. Berlin wants to spend €3.36 billion on TLVS between 2021 and 2028, according to a draft government budget proposal meant for deliberation by lawmakers after the summer recess. That figure likely would be too low to finance Lockheed's entire program proposal. But the draft budget includes a provision permitting a transfer of funds from the envisioned €5.6 billion budget for a new heavy transport helicopter. The two contenders for that program are Boeing and Lockheed Martin. https://www.defensenews.com/digital-show-dailies/paris-air-show/2019/06/26/lockheed-braces-for-german-blowback-over-cost-of-missile-defense-pitch/

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  March 29, 2019 | International, C4ISR, Security, Other Defence

  DARPA Seeks to Make Scalable On-Chip Security Pervasive

  For the past decade, cybersecurity threats have moved from high in the software stack to progressively lower levels of the computational hierarchy, working their way towards the underlying hardware. The rise of the Internet of Things (IoT) has driven the creation of a rapidly growing number of accessible devices and a multitude of complex chip designs needed to enable them. With this rapid growth comes increased opportunity for economic and nation-state adversaries alike to shift their attention to chips that enable complex capabilities across commercial and defense applications. The consequences of a hardware cyberattack are significant as a compromise could potentially impact not millions, but billions of devices. Despite growing recognition of the issue, there are no common tools, methods, or solutions for chip-level security currently in wide use. This is largely driven by the economic hurdles and technical trade-offs often associated with secure chip design. Incorporating security into chips is a manual, expensive, and cumbersome task that requires significant time and a level of expertise that is not readily available in most chip and system companies. The inclusion of security also often requires certain trade-offs with the typical design objectives, such as size, performance, and power dissipation. Further, modern chip design methods are unforgiving – once a chip is designed, adding security after the fact or making changes to address newly discovered threats is nearly impossible. “Today, it can take six to nine months to design a modern chip, and twice as long if you want to make that same design secure,” said Serge Leef, a program manager in DARPA's Microsystems Technology Office (MTO). “While large merchant semiconductor companies are investing in in-house personnel to manually incorporate security into their high-volume silicon, mid-size chip companies, system houses, and start-ups with small design teams who create lower volume chips lack the resources and economic drivers to support the necessary investment in scalable security mechanisms, leaving a majority of today's chips largely unprotected.” To ease the burden of developing secure chips, DARPA developed the Automatic Implementation of Secure Silicon (AISS) program. AISS aims to automate the process of incorporating scalable defense mechanisms into chip designs, while allowing designers to explore economics versus security trade-offs and maximize design productivity. The objective of the program is to develop a design tool and IP ecosystem – which includes tool vendors, chip developers, IP licensers, and the open source community – that will allow security to be inexpensively incorporated into chip designs with minimal effort and expertise, ultimately making scalable on-chip security pervasive. Leef continued, “The security, design, and economic objectives of a chip can vary based on its intended application. As an example, a chip design with extreme security requirements may have to accept certain tradeoffs. Achieving the required security level may cause the chip to become larger, consume more power, or deliver slower performance. Depending on the application, some or all of these tradeoffs may be acceptable, but with today's manual processes it's hard to determine where tradeoffs can be made.” AISS seeks to create a novel, automated chip design flow that will allow the security mechanisms to scale consistently with the goals of the design. The design flow will provide a means of rapidly evaluating architectural alternatives that best address the required design and security metrics, as well as varying cost models to optimize the economics versus security tradeoff. The target AISS system – or system on chip (SoC) – will be automatically generated, integrated, and optimized to meet the objectives of the application and security intent. These systems will consist of two partitions – an application specific processor partition and a security partition implementing the on-chip security features. This approach is novel in that most systems today do not include a security partition due to its design complexity and cost of integration. By bringing greater automation to the chip design process, the burden of security inclusion can be profoundly decreased. While the threat landscape is ever evolving and expansive, AISS seeks to address four specific attack surfaces that are most relevant to digital ASICs and SoCs. These include side channel attacks, reverse engineering attacks, supply chain attacks, and malicious hardware attacks. “Strategies for resisting threats vary widely in cost, complexity, and invasiveness. As such, AISS will help designers assess which defense mechanisms are most appropriate based on the potential attack surface and the likelihood of a compromise,” said Leef. In addition to incorporating scalable defense mechanisms, AISS seeks to ensure that the IP blocks that make up the chip remain secure throughout the design process and are not compromised as they move through the ecosystem. As such, the program will also aim to move forward provenance and integrity validation techniques for preexisting design components by advancing current methods or inventing novel technical approaches. These techniques may include IP watermarking and threat detection to help validate the chip's integrity and IP provenance throughout its lifetime. AISS is part of the second phase of DARPA's Electronics Resurgence Initiative (ERI) – a five-year, upwards of $1.5 billion investment in the future of domestic, U.S. government, and defense electronics systems. Under ERI Phase II, DARPA is exploring the development of trusted electronics components, including the advancement of electronics that can enforce security and privacy protections. AISS will help address this mission through its efforts to enable scalable on-chip security. DARPA will hold a Proposers Day on April 10, 2019 at the DARPA Conference Center, located at 675 North Randolph Street, Arlington, Virginia 22203, to provide more information about AISS and answer questions from potential proposers. For details about the event, including registration requirements, please visit: https://www.fbo.gov/index?s=opportunity&mode=form&id=6770487d820ee13f33af67b0980a7d73&tab=core&_cview=0 Additional information will be available in the forthcoming Broad Agency Announcement, which will be posted to www.fbo.gov. https://www.darpa.mil/news-events/2019-03-25

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  May 20, 2022 | International, Aerospace

  India halts Ka-31 helicopter deal with Russia

  India asked to buy Ka-31 helicopters from Russia in May 2019, but the acquisition program faced inordinate delays due to the coronavirus pandemic and the platform's high price tag.