February 13, 2019 | International, Other Defence
DARPA: Architecting a New Breed of High Performance Computing for Virtual Training Environments
The testing, evaluation and training of future military systems will increasingly take place in virtual environments due to rising costs and system complexity as well as the limited availability of military ranges. Virtual simulators are already used to augment real-world training for modern fighter aircraft pilots, and they hold significant promise for addressing the rigorous demands of testing and training AI-enabled technologies. Current simulated environments, however, rely on conventional computing that is incapable of generating the computational throughput and speed to accurately replicate real-world interactions, model the scale of physical test ranges or meet the technical requirements of more complex systems. “Virtual environments could significantly aid the military by creating the ability to test and train advanced radio frequency (RF) technologies 24/7/365 with high-fidelity models of complex sensor systems, like radar and communications,” said Paul Tilghman, program manager in DARPA's Microsystems Technology Office (MTO). “However, existing computing technologies are unable to accurately model the scale, waveform interactions or bandwidth demands required to replicate real-world RF environments.” To address current computing limitations impeding the development of virtual test environments, DARPA created the Digital RF Battlespace Emulator (DBRE) program. DRBE seeks to create a new breed of High Performance Computing (HPC) – dubbed “Real Time HPC” or RT-HPC – that will effectively balance computational throughput with extreme low latency capable of generating the high-fidelity emulation of RF environments. DRBE will demonstrate the use of RT-HPC by creating the world's first largescale virtual RF test range. The range will aim to deliver the scale, fidelity and complexity needed to match how complex sensor systems are employed today, providing a valuable development and testing environment for the Department of Defense (DoD). “While DRBE's primary research goal is to develop real time HPC that can be used to replicate the interactions of numerous RF systems in a closed environment, this is not the only application for this new class of computing. RT-HPC could have implications for a number of military and commercial capabilities beyond virtual environments – from time-sensitive, big-data exploitation to scientific research and discovery,” said Tilghman. To support the creation of RT-HPC and the DRBE RF test range, the program will focus on two primary research areas. One area will explore designing and developing novel computing architectures and domain-specific hardware accelerators that can meet the real-time computational requirements of RT-HPC. Existing HPCs rely on general-purpose computing devices, which either prioritize high computational throughput while sacrificing latency (i.e., Graphics Processing Units (GPUs)), or have very low latency with correspondingly low computational throughput (i.e., Field Programmable Gate Arrays (FPGAs)). DRBE seeks to overcome the limitations of both by creating a new breed of HPC hardware that combines the GPU's and FPGA's best traits. The second research area will focus on the development of tools, specifications and interfaces, and other system requirements to support the integration of the RT-HPC system and the creation of the virtual RF test range. These components will help design and control the various test scenarios that could be run within the range, enable the DRBE's RT-HPC to interface with external systems for testing, facilitate the resource allocation needed to support multiple experiments, and beyond. DRBE is part of the second phase of DARPA's Electronics Resurgence Initiative (ERI) – a five-year, upwards of $1.5 billion investment in the future of domestic, U.S. government and defense electronics systems. As a part of ERI Phase II, DARPA is creating new connections between ERI programs and demonstrating the resulting technologies in defense applications. DRBE is helping to fulfill this mission by bringing the benefits of domain specific processing architectures to defense systems. DARPA will hold a Proposers Day on February 13, 2019 from 9:00am to 5:00pm (EST) at 4075 Wilson Boulevard, Suite 300 Arlington, Virginia 22203, to provide more information about DRBE and answer questions from potential proposers. For details on the event, including registration requirements, please visit: http://www.cvent.com/events/darpa-mto-drbe-proposers-day/event-summary-69f231cef8814aa799cd60588b5dc9cf.aspx A forthcoming Broad Agency Announcement will fully describe the program structure and objectives. https://www.darpa.mil/news-events/2019-02-11